A temperature and disturbance insensitive calibration method for high speed digital to analog converters

The accuracy of a Digital to Analog Converter (DAC) is crucial for its operation. Due to production tolerances [1], the DAC static accuracy is limited, increasing the Integral Non-Linearity (INL). Traditionally, various calibration techniques are used to improve the INL [2]. In a Current Steering (CS) DAC, the output signal is generated by switchable current sources, the current cells, see Fig. 1. Typically, calibration techniques incorporate an additional current source (Calibration DAC, CALDAC) in each current cell, which adds a correction current to the main current source thereby cancelling the error of the main current source. However, the response of the CALDAC to voltage disturbances and temperature variations differs from the response of the main current source. In the proposed calibration method, the new current cell contains the same unit transistors for both the main current source and the CALDAC, guaranteeing matched response for all current cells. The CALDAC contains an excess of current source unit transistors. Hence, some of these transistors in the CALDAC must be enabled and others must be disabled. By carefully selecting the enabled transistors, the mismatch of the enabled CalDAC transistors cancel the mismatch of the main current source of the current cell. Therefore, all calibrated current cells feature matched temperature coefficients and disturbance response. For an exemplary 6+6bits segmented current steering DAC, the expected 99% yield INL improves with almost 3 bits while using only 30% additional unit transistors.